Synchronous Up-Down Counters

A circuit of a 3-bit synchronous up-down counter and a table of its sequence are shown below. Similar to an asynchronous up-down counter, a synchronous up-down counter also has an up-down control input. It is used to control the direction of the counter through a certain sequence.

An examination of the sequence table shows: for both the UP and DOWN sequences, Q0 toggles on each clock pulse. for the UP sequence, Q1 changes state on the next clock pulse when Q0=1. for the DOWN sequence, Q1 changes state on the next clock pulse when Q0=0. for the UP sequence, Q2 changes state on the next clock pulse when Q0=Q1=1. for the DOWN sequence, Q2 changes state on the next clock pulse when Q0=Q1=0.

These characteristics are implemented with the AND, OR & NOT logic connected as shown in the logic diagram above.